Display devices have employed cathode-ray tubes (CRT) to display images. However, various types of flat panel displays, such as liquid crystal display (LCD) devices, plasma display panel (PDP) devices, field emission display (FED) devices, and electro-luminescent display (ELD) devices, are currently being developed as substitutes for the CRT. Among these various types of flat panel displays, LCD devices have advantages of thin profile and low power consumption, but have disadvantages of using a backlight unit because they are non-luminescent display devices. However, as organic electroluminescent display (OELD) devices are self-luminescent display devices, they are operated at low voltages and have a thin profile. Further, the OELD devices have advantages of fast response time, high brightness and wide viewing angles.
In a related art OLED shown in FIG. 1, a plurality of gate lines G1, G2, . . . , and Gm are extended along a first direction, and a plurality of data lines D1, D2, . . . , and Dn are extended along a second direction perpendicular to the first direction. The gate and data lines define respective pixel regions arranged in a matrix form. In each pixel region, a switching thin film transistor P1, a storage capacitor C1, a driving thin film transistor P2 and an organic electroluminescent diode OED are disposed. The switching and driving thin film transistors P1 and P2 include p-type thin film transistors.
Gate electrodes of the switching thin film transistors P1 are connected to the respective gate lines G1, G2, . . . , and Gm, and the source electrodes of the switching thin film transistors P1 are connected to the respective data lines D1, D2, . . . , and Dn. A first electrode of the storage capacitor C1 is connected to a drain electrode of the switching thin film transistor P1, and a second electrode of the storage electrode C1 is connected to a power terminal Vdd. Source electrodes of the driving thin film transistor P2 are connected to the power terminal Vdd, the gate electrodes of the driving thin film transistors P2 are connected to the respective drain electrodes of the switching thin film transistors P1, and drain electrodes of the driving thin film transistors P2 are connected to the respective first electrodes of the organic electroluminescent diodes OED. The second electrode of the organic electroluminescent diode OED is connected to a ground terminal.
An “on” gate signal is applied to a selected gate line GS1, G2, . . . , or Gm, and the switching thin film transistor P1 connected to the selected gate line G1, G2, . . . , or Gm is turned on. When the switching thin film transistor P1 is turned on, a data signal is charged on the storage capacitor C1. The charged data signal is applied to the gate electrode of the driving thin film transistor P2 and adjusts an “on” current in the driving thin film transistor P2. In response to the “on” current, the organic electroluminescent diode OED emits light. In this manner, the respective organic electroluminescent diodes “OED” emit light when the respective gate lines G1, G2, . . . , and Gm are sequentially selected.
As the size of the OELD device increases, the gate and data lines have longer paths. Accordingly, a resistance-capacitance (RC) delay of the signal lines having long paths increases, and distortion of display images occurs.
One means of solving the problem of distortion of the display images, where the display area is subdivided and each of the subdivided areas is operated by a separate driving circuit, has been suggested.
FIG. 2 is a conceptual view of an OELD device having a subdivided display area. A display area is divided into a first to a sixth six sub-area, S1-S6. The first to sixth sub-areas are operated independently from one another by using corresponding data driving circuits S1-DATA through S6-DATA and corresponding gate driving circuits S1-SCAN through S6-SCAN. Although not shown in FIG. 2, gate driving circuits for the second and fifth sub-areas S2 and S5 are also provided.
A driving circuit control portion (not shown) controls the driving circuits S1-DATA through S6-DATA and S1-SCAN through S6-SCAN. Data signals are supplied to the driving circuit control portion having a memory device, and the memory device stores the data signals. Data signals of one frame for one display image are divided into six arrays corresponding to the six sub-areas S1 through S6. The driving circuit control portion outputs each array of the data signals to the corresponding data driving circuits S1-DATA through S6-DATA. Each data driving circuit S1-DATA through S6-DATA simultaneously outputs the corresponding array of the data signals of one frame to the corresponding sub-areas S1 through S6. In each of the sub-areas S1 through S6, the data signals are applied to pixel regions along the data line sequentially according to scanning the gate lines of each sub-area S1 through S6 by each gate driving circuit S1-SCAN to S6-SCAN, resulting in the display of an image.
This method of driving a subdivided display area is applicable to an LCD device, but problematic for an OELD device having a fast response time. In particular, method is problematic for the large sized OELD device, as a display image is displayed discontinuously at boundary portions between an upper sub-area and a lower sub-area.
FIG. 3 is a progressive view illustrating a method of driving a bifurcated display area of an OELD device, and FIG. 4 is a block diagram illustrating a transfer flow of data signals in a driving circuit control portion of an OELD device of FIG. 3.
As shown in FIGS. 3 and 4, a display area of the OELD device includes an upper sub-area U and a lower sub-area L. A moving image moves from a first position A to a second position B. In FIG. 3, movement of the moving image is shown sequentially with four steps, ST1 through ST4. Although not shown in FIG. 3, the upper sub-area U is operated by an upper data driving circuit and an upper gate driving circuit, and the lower sub-area L is operated by a lower data driving circuit and a lower gate driving circuit. Each of the sub-areas is scanned from the top to the bottom thereof.
A driving circuit control portion 10 is supplied with data signals of one frame and simultaneously outputs divided upper and lower data signal arrays of one frame into corresponding upper and lower data driving circuits.
In detail, the driving circuit control portion 10 is supplied with data signals of a (n−1)th frame, and the data signals of the (n−1)th frame are divided into an upper data signal array and an lower data signal array. The upper and lower data signal arrays of the (n−1)th frame are outputted to the upper and lower data driving circuits and supplied to the upper and lower sub-areas U and L, respectively. Subsequently, data signals of a next frame, i.e., a nth frame, are supplied to the driving circuit control potion 10, divided and outputted to the upper and lower sub-areas U and L.
The moving image of the first position A is displayed when the upper and lower data arrays of the (n−1)th frame are written on the entire upper and lower sub-areas U and L, respectively. Then, in the first step ST1 corresponding to a first quarter of the nth frame period, an upper portion of the moving image of the lower sub-area L moves to the second position B, but the other portions of the moving image do not yet move. Then, in the second step ST2, between the first quarter and a second quarter of the nth frame period, a lower portion of the moving image of the lower sub-area L moves to the second position B. Then, in the third step ST3, the second quarter and a third quarter of the nth frame period, an upper portion of the moving image of the upper sub-area U moves to the second position B. Then, in the fourth step ST4, during the third quarter and a fourth quarter of the nth frame period, a lower portion of the moving image of the upper sub-area U moves to the second position B.
When the display area is divided into the upper and lower sub-areas and the two sub-areas are operated simultaneously with the data signals of the same frame and independently from each other, the moving image displayed across the boundary portion between the upper and lower sub-areas moves unnaturally because of the fast response time of the OELD device. Therefore, an observer perceives an unnatural movement of the moving image across the boundary, as if the display image of the present frame overlaps that of the previous frame.